| Interface | Description |
|---|---|
| FiveRegInsn |
Interface for instructions that need five registers.
Note that the interface does not inherit from ThreeRegInsn due to the unusual register naming - the register indices cannot be overwritten here. |
| Insn |
Interface for the dalvik instruction formats.
|
| OneRegInsn |
Interface for instructions that need one register.
|
| ThreeRegInsn |
Interface for instructions that need three registers.
|
| TwoRegInsn |
Interface for instructions that need two registers.
|
| Class | Description |
|---|---|
| AbstractInsn |
Abstract implementation of an
Insn. |
| AddressInsn |
Inspired by com.android.dx.dex.code.CodeAddress: pseudo instruction for use
as jump target or start/end of an exception handler range.
|
| Insn10t |
The "10t" instruction format: It needs one 16-bit code unit, does not have any registers
and is used for jump targets (hence the "t").
It is used by the "goto" opcode for jumps to offsets up to 8 bits away. |
| Insn10x |
The "10x" instruction format: It needs one 16-bit code unit, does not have any registers
and is used for general purposes (hence the "x").
It is used by the opcodes "nop" and "return-void". |
| Insn11n |
The "11n" instruction format: It needs one 16-bit code unit, has one register
and is used for a 4-bit literal (hence the "n" for "nibble").
It is used by the opcode "const/4". |
| Insn11x |
The "11x" instruction format: It needs one 16-bit code unit, has one register
and is used for general purposes (hence the "x").
It is used e.g. |
| Insn12x |
The "12x" instruction format: It needs one 16-bit code unit, has two registers
and is used for general purposes (hence the "x").
It is used e.g. |
| Insn20t |
The "20t" instruction format: It needs two 16-bit code units, does not have any registers
and is used for jump targets (hence the "t").
It is used by the "goto/16" opcode for jumps to a 16-bit wide offset. |
| Insn21c |
The "21c" instruction format: It needs two 16-bit code units, has one register
and is used for class/string/type items (hence the "c" for "constant pool").
It is used e.g. |
| Insn21s |
The "21s" instruction format: It needs two 16-bit code units, has one register
and is used for a 16-bit literal (hence the "s" for "short").
It is used by the opcodes "const/16" and "const-wide/16". |
| Insn21t |
The "21t" instruction format: It needs two 16-bit code units, has one register
and is used for jump targets (hence the "t").
It is used e.g. |
| Insn22b |
The "22b" instruction format: It needs two 16-bit code units, has two registers
and is used for a 8-bit literal (hence the "b" for "byte").
It is used by the "/lit8" opcodes for binary operations. |
| Insn22c |
The "22c" instruction format: It needs two 16-bit code units, has two registers
and is used for class/type items (hence the "c" for "constant pool").
It is used e.g. |
| Insn22s |
The "22s" instruction format: It needs two 16-bit code units, has two registers
and is used for a 16-bit literal (hence the "s" for "short").
It is used by the "/lit16" opcodes for binary operations. |
| Insn22t |
The "22t" instruction format: It needs two 16-bit code units, has two registers
and is used for jump targets (hence the "t").
It is used e.g. |
| Insn22x |
The "22x" instruction format: It needs two 16-bit code units, has two registers
and is used for general purposes (hence the "x").
It is used by the opcodes "move/from16", "move-wide/from16" and "move-object/from16". |
| Insn23x |
The "23x" instruction format: It needs two 16-bit code units, has three registers
and is used for general purposes (hence the "x").
It is used e.g. |
| Insn30t |
The "30t" instruction format: It needs three 16-bit code units, does not have any registers
and is used for jump targets (hence the "t").
It is used by the "goto/32" opcode for jumps to a 32-bit wide offset. |
| Insn31i |
The "31i" instruction format: It needs three 16-bit code units, has one register
and is used for a 32-bit literal (hence the "i" for "integer").
It is used by the opcodes "const" and "const-wide/32". |
| Insn31t |
The "31t" instruction format: It needs three 16-bit code units, has one register
and is used for jump targets (hence the "t").
It is used e.g. |
| Insn32x |
The "32x" instruction format: It needs three 16-bit code units, has two registers
and is used for general purposes (hence the "x").
It is used by the opcodes "move/16", "move-wide/16" and "move-object/16". |
| Insn35c |
The "35c" instruction format: It needs three 16-bit code units, has five registers
and is used for method/type items (hence the "c" for "constant pool").
It is used by the "filled-new-array" opcode and the various "invoke-" opcodes. IMPLEMENTATION NOTE: the wide args for "35c" must be explicitly stated - internally, such args are implicitly represented by e.g. |
| Insn3rc |
The "3rc" instruction format: It needs three 16-bit code units, has a whole range
of registers (hence the "r" for "ranged") and is used for method/type items
(hence the "c" for "constant pool").
It is used by the "filled-new-array/range" opcode and the various ranged "invoke-" opcodes. |
| Insn51l |
The "51l" instruction format: It needs five 16-bit code units, has one register
and is used for a 64-bit literal (hence the "l" for "long").
It is used by the opcode "const-wide". |
| InsnWithOffset |
An abstract implementation for instructions that have a jump label.
|
| PackedSwitchPayload |
The payload for a packed-switch instruction.
|
| SparseSwitchPayload |
The payload for a sparse-switch instruction.
|
| SwitchPayload |
The payload for switch instructions, usually placed at the end of a method.
|